Thermal Design, Heatsinks & Safe Operating Area

Keeping semiconductors cool enough to survive. Learn the thermal–electrical analogy (power ↔ current, temperature ↔ voltage, thermal resistance ↔ resistance), junction-to-case, case-to-sink and sink-to-ambient resistances, θ_JA vs Ψ_JT, heatsink selection, thermal interface materials, PCB copper as a heatsink, power derating curves, transient thermal impedance Z_th for pulses, safe operating area (SOA) and second breakdown, and reliability effects of temperature (Arrhenius) — with Python sizing a heatsink, computing derating and pulse temperature rise.

Every watt dissipated must flow from the tiny junction to the ambient air. The junction temperature determines whether a part works, how long it lives, and whether it fails catastrophically.

Thermal design uses the same series-resistance thinking as circuit analysis — which makes it easy to get right early, and very expensive to fix late.

An analogy

Heat flow is like water flowing through a series of pipes from a hot tank (junction) to the sea (ambient): each pipe (die attach, case, interface pad, heatsink) resists the flow, and the water level (temperature) in the tank rises until the flow out equals the heat put in.

Heat flow basics

Heat moves by conduction (through solids), convection (to moving air) and radiation. In electronics, conduction carries heat from the die to the heatsink, and convection/radiation carry it to the air. Each path has a thermal resistance in °C/W: the temperature rise per watt.

Datasheet parameters

What to read:

Heatsinks and interfaces

Heatsink θ_SA depends on size, fin design, orientation and airflow (forced air can reduce it 2–5×). Interface materials (grease, pads, phase-change) have θ_CS of 0.1–1 °C/W; electrically insulating pads add more. For SMD parts, PCB copper area, thermal vias under the exposed pad and inner planes form the heatsink — 2 oz copper and many vias make a big difference.

SOA, pulses and reliability

Safe operating area limits simultaneous voltage and current: at high V_CE, BJTs suffer second breakdown (hot spots), and linear-mode MOSFETs suffer the Spirito effect (thermal instability) — so linear power stages need SOA-aware design and derating. For pulses, use the Z_th curves: a device can handle much higher power for µs–ms. Temperature cycling fatigues solder and bond wires; electrolytic capacitor life halves for every 10 °C — thermal design is reliability design.

Formulas

Worked example: Junction temperature

Given: P 5 W, θ_JA 40 °C/W, T_A 30 °C

Find: T_J.

Answer: 230 °C — needs a heatsink!

Worked example: Heatsink

Given: 30 W, T_J 125 °C design, T_A 40 °C, θ_JC 1.0, θ_CS 0.3

Find: θ_SA.

Answer: ≤ 1.53 °C/W

Worked example: Life improvement

Given: Electrolytic 20 °C cooler

Find: Life factor.

Answer: ≈ 4× longer

Thermal resistance network

  P_D (W) → T_J ─[θ_JC 1.5]─ T_C ─[θ_CS 0.5]─ T_S ─[θ_SA ?]─ T_A (45 °C)
  Like Ohm's law: ΔT = P × θ   (°C = W × °C/W)
  Capacitances (thermal mass) at each node set the transient response

Temperatures are node voltages, power is current and thermal resistances are resistors in series. The heatsink is the only term you usually choose — the rest come from the device and the interface material.

Heatsink, derating and pulse calculations

# Thermal design: junction temperature, heatsink selection, derating and transient pulse
P, Tj_max, Ta = 12.0, 150.0, 45.0
th_jc, th_cs = 1.5, 0.5                           # C/W junction-case, case-sink (with thermal pad)
th_total_max = (Tj_max - Ta) / P
th_sa_max = th_total_max - th_jc - th_cs
print(f"allowed total {th_total_max:.2f} C/W -> heatsink must be <= {th_sa_max:.2f} C/W")
Tj_design = 125.0                                  # design margin below absolute max
th_sa = (Tj_design - Ta) / P - th_jc - th_cs
print(f"for Tj = 125 C design target: heatsink <= {th_sa:.2f} C/W")
# Without heatsink: TO-220 theta_ja ~ 62 C/W
print(f"no heatsink: max power at 45 C ambient = {(Tj_design-Ta)/62:.2f} W")
# Derating: power rating 50 W at Tc = 25 C, derate linearly to 0 at 150 C
for Tc in (25, 75, 100):
    print(f"Tc = {Tc:3d} C: allowed {50*(150-Tc)/(150-25):.1f} W")
# Transient: 5 ms pulse of 40 W, Zth(5 ms) ~ 0.3 C/W
print(f"5 ms, 40 W pulse: junction rise ~ {40*0.3:.0f} C above case")
# allowed total 8.75 C/W -> heatsink must be <= 6.75 C/W
# for Tj = 125 C design target: heatsink <= 4.67 C/W
# no heatsink: max power at 45 C ambient = 1.29 W
# Tc =  25 C: allowed 50.0 W
# Tc =  75 C: allowed 30.0 W
# Tc = 100 C: allowed 20.0 W
# 5 ms, 40 W pulse: junction rise ~ 12 C above case

At 12 W and 45 °C ambient, a 6.75 °C/W heatsink just reaches the 150 °C limit; designing for 125 °C demands 4.67 °C/W. Without any heatsink a TO-220 handles only ~1.3 W. The derating curve shows a '50 W' transistor is only a 20 W part if its case is at 100 °C. Short pulses are much easier: a 40 W, 5 ms pulse raises the junction just ~12 °C.

Common mistakes

Applications

Key takeaways

Going further