11.6 RAM: Random-Access Read/Write Memory

Explain what distinguishes RAM from ROM-family devices — full read/write capability and volatility — and how random access differs from sequential access.

RAM (Random-Access Memory) is read/write memory: unlike every ROM-family device covered so far, a RAM allows both reading and writing to any address, as many times as needed, with no special erase step and no meaningful limit on write cycles for the memory's practical lifetime. 'Random access' specifically means that any address can be reached directly and in the same amount of time, regardless of which address was accessed previously — contrasted with sequential-access storage (like a tape), where reaching a given location may take longer depending on the current position. RAM is the working memory of virtually every digital system: it holds the data and instructions a processor is actively using right now, because it can be written to at full speed as computation proceeds, which no ROM-family device can do. The trade-off for this flexibility is volatility: standard RAM loses all of its stored contents the instant power is removed, which is exactly why systems also need nonvolatile ROM-family memory to hold code and data that must survive a power cycle.

Core concept: random access, and read/write both supported

The word 'random' in RAM refers to access pattern, not internal unpredictability: given an address, a RAM can be read or written directly, with uniform access time across the whole address space, regardless of the sequence of prior accesses. This is what makes RAM suitable for holding actively-changing program data — variables, the stack, working buffers — where the processor needs to read and write arbitrary locations, in arbitrary order, at full operating speed.

Every RAM shares the same address-in/data-in-or-out interface pattern as ROM (an address bus selects a location via an internal decoder), but adds a write-enable control input and bidirectional (or separate in/out) data lines, since data must be able to flow in both directions: written into the array by the host, and read back out later.

• Random-access: any address reachable directly, with equal access time regardless of prior access history • Read/write: both operations are fully supported, with no meaningful limit on write cycles • Volatile: contents are lost when power is removed (in the standard RAM sense used here) • Serves as the system's working memory — holding data and code actively being used by a processor

Step-by-step: a RAM read cycle and a RAM write cycle

Read cycle: the host places the desired address on the address bus and asserts a read/enable control; the internal decoder selects the addressed row, and the stored value at that location is driven onto the data bus, exactly as with ROM. Write cycle: the host places the address on the address bus and the new data value on the data bus, then asserts the write-enable control; internally, the decoder again selects the addressed row, but this time the incoming data value is latched or stored into that location's storage element, overwriting whatever was previously there.

Because both directions are supported, and because there is no erase step or endurance limit to manage (unlike Flash/EEPROM), software and hardware designers treat RAM as freely and repeatedly writable — this is precisely the property that lets a CPU use RAM to hold a call stack, heap, or register-spill area that changes on every clock cycle.

RAM's place among the memory family, and what comes next

RAM's defining pair of properties — full read/write access and volatility — is what separates it from every ROM-family device in this module: ROM/PROM/EPROM/EEPROM/Flash are all nonvolatile but restrict writing (from 'not writable at all after programming' through to 'writable, but with block-erase or endurance constraints'), while RAM sacrifices nonvolatility to gain unrestricted, fast, symmetric read/write access.

The RAM family itself further splits by how each memory cell physically stores its bit: the next two topics, SRAM and DRAM, cover the two dominant cell technologies — flip-flop-based static storage versus capacitor-based dynamic storage — which trade off speed, density, and the need for periodic refresh.

RAM interface notation

RAM interface signals:
  Address bus     → selects the location (same decoder concept as ROM)
  Data bus        → bidirectional: carries data IN on write, data OUT on read
  Write-Enable (WE) → LOW/HIGH asserts a write; deasserted → read

Read:  WE inactive, address valid  → data bus driven OUT by the RAM
Write: WE active, address + data valid → data bus driven IN, stored at that address

Code Examples

This sequence highlights exactly what 'random-access read/write' buys over ROM: the same address can be written and immediately read back with the new value, on demand, with no programming equipment and no erase step.

RAM supports write-then-immediate-readback at any address; ROM-family devices do not (without special programming).

Initial state at address 0x20:  0x00

Cycle 1 (READ):   Address=0x20, WE=inactive → Data bus reads 0x00
Cycle 2 (WRITE):  Address=0x20, Data=0x5A, WE=active → 0x5A stored at 0x20
Cycle 3 (READ):   Address=0x20, WE=inactive → Data bus reads 0x5A

Contrast: performing the same 3-cycle sequence on a ROM would fail at
Cycle 2 — ROM provides no write-enable path, so the stored value at
0x20 could never change.

RAM block interface

The extra write-enable input and bidirectional data path are exactly what distinguish RAM's interface from ROM's read-only interface.

Address bus (N lines)
            │
            ▼
  ┌───────────────────┐
  │  N-to-2^N Decoder  │
  └─────────┬──────────┘
            │
            ▼
  ┌───────────────────────────┐        Write-Enable (WE)
  │   Read/Write storage array │◄───────────────┘
  └─────────┬──────────────────┘
            ▲│
            │▼
      Data bus (bidirectional, W lines)

Important Rules

RAM supports both reading and writing at any address, with no special erase step.

'Random access' means uniform access time to any address, independent of access history.

Standard RAM is volatile: contents are lost when power is removed.

RAM cell technology (SRAM vs DRAM) determines speed, density, and refresh requirements.

Where RAM is used

RAM is the working memory in every computing device: main system memory (DRAM modules) holds the operating system, running programs, and active data; CPU caches and register files (built from SRAM) hold the smallest, fastest-access working set; embedded microcontrollers use on-chip RAM to hold the stack, heap, and global variables during program execution.

Assuming RAM is nonvolatile simply because it can be written like EEPROM/Flash.

Writability and volatility are independent properties — RAM is fully writable AND volatile, while EEPROM/Flash are writable (with constraints) AND nonvolatile.

Students often conflate 'can be written' with 'keeps data without power'; RAM is the clearest counterexample, since it is the most freely writable memory type in this module yet loses everything on power loss.

[conceptual] What does 'random access' mean in the context of RAM? A. Data is stored at unpredictable, random addresses chosen by the memory chip B. Any address can be accessed directly, with the same access time regardless of which address was accessed previously C. The memory randomly refreshes its contents D. Read and write operations happen in a randomly chosen order

B. Any address can be accessed directly, with the same access time regardless of which address was accessed previously — 'Random access' describes uniform, direct addressability — any location can be reached in the same amount of time independent of access history — as opposed to sequential-access media where reaching a location depends on the current position.

[interview] What two properties together distinguish RAM from every ROM-family memory type in this module? A. RAM is nonvolatile and read-only B. RAM is fully read/write (no erase step, no meaningful write-cycle limit) and volatile (loses data without power) C. RAM uses fuses, like PROM D. RAM requires UV light to erase

B. RAM is fully read/write (no erase step, no meaningful write-cycle limit) and volatile (loses data without power) — RAM supports unrestricted reading and writing at any address, with no special erase step and no practical write-cycle limitation, but this comes at the cost of volatility — all data is lost the instant power is removed, unlike ROM/PROM/EPROM/EEPROM/Flash, which are all nonvolatile.

A student claims: 'Since RAM allows unlimited writes at any address, it must be superior to ROM in every way, so ROM is obsolete.' Identify the flaw in this reasoning using the volatility property.

The claim ignores volatility: RAM loses all contents when power is removed, so it cannot hold the boot code or fixed program a system needs to start up from a cold power-on — there would be nothing in RAM to execute. ROM-family memory (ROM/PROM/EPROM/EEPROM/Flash) is essential precisely because it retains its contents without power, giving the system something fixed and reliable to begin executing before RAM is even initialized. RAM and ROM serve complementary, not competing, roles.

Think about what happens to each memory type's contents the instant power is removed, and why that matters for boot code.