Op-Amp Circuits: Inverting, Non-Inverting, Summing, Difference & Integrator

The essential op-amp circuits and how to analyse any of them with the golden rules. Learn the voltage follower, inverting and non-inverting amplifiers, summing (mixer) amplifier, difference amplifier and its CMRR limit from resistor tolerance, integrator and differentiator (and their practical fixes), single-supply biasing with a mid-rail reference, AC-coupled amplifiers, and signal-gain vs noise-gain — with Python computing gains, summing outputs, difference-amp CMRR and integrator ramp rates.

A handful of op-amp circuits cover most everyday analog tasks: buffering, amplifying, inverting, mixing, subtracting and integrating. Each is analysed with the same two rules — the inputs are at the same voltage, and no current flows into them.

Practical details — resistor values, single-supply operation, DC paths for bias current, and stability of integrators and differentiators — separate a textbook circuit from a working one.

An analogy

The inverting amplifier is a seesaw pivoting on the virtual ground: the input pushes one end down by R_in, and the output end rises in the opposite direction by an amount set by the arm length ratio R_f/R_in.

Analysing any op-amp circuit

1) Assume negative feedback works: V₋ = V₊. 2) Find V₊ from the circuit connected to the + input. 3) Write KCL at the − input with zero current into the op-amp. 4) Solve for V_out. This works for every linear op-amp circuit — amplifiers, filters, integrators — as long as the output is not saturated.

Core circuits

The toolkit:

Single-supply design

On a single supply, bias the non-inverting input at a mid-rail reference (V_CC/2 from a divider with a bypass capacitor, or a buffered reference), AC-couple the input, and put a capacitor in series with R₁ so the DC gain is 1 (the output sits at V_REF rather than amplifying it). Use rail-to-rail parts when swing near the rails matters.

Practical refinements

Choose resistor values 1–100 kΩ (lower → more current and loading; higher → more noise, bias-current error and sensitivity to stray capacitance). Add a small capacitor across R_f to limit bandwidth and cancel input capacitance. Integrators need a reset switch or a parallel resistor (lossy integrator); differentiators need a series input resistor and a feedback capacitor to stop high-frequency gain and oscillation. Signal gain and noise gain differ in inverting circuits (−R_f/R₁ vs 1 + R_f/R₁): stability and bandwidth depend on noise gain.

Formulas

Worked example: Inverting gain

Given: R_in 4.7 kΩ, R_f 100 kΩ

Find: G.

Answer: −21.3

Worked example: Non-inverting gain

Given: R₁ 10 kΩ, R_f 39 kΩ

Find: G.

Answer: 4.9

Worked example: Integrator ramp

Given: R 100 kΩ, C 1 µF, V_in 1 V

Find: Ramp rate.

Answer: −10 V/s

Inverting and non-inverting amplifiers

  Inverting                           Non-inverting
            R_f                                  R_f
        ┌──/\/\──┐                        ┌──/\/\──┐
  vin ─/\/\─┤−        │                 ┌─/\/\─┤−        │
      R_in  │  ▷────┴── vout         R₁  │     │  ▷────┴── vout
       GND ─┤+                          GND    vin ─┤+
  G = −R_f/R_in                        G = 1 + R_f/R₁

In the inverting amplifier the − input is a virtual ground, so all input current flows through R_f. In the non-inverting amplifier the input drives the high-impedance + input, and the output rises until the divider returns the same voltage to the − input.

Gains, mixing, difference-amp CMRR and integration

import math
# Basic op-amp circuits: inverting, non-inverting, summing, difference and integrator values
Rin, Rf = 10e3, 47e3
print(f"inverting: gain {-Rf/Rin:.2f}, input resistance {Rin/1e3:.0f}k")
print(f"non-inverting: gain {1+Rf/Rin:.2f}, input resistance ~ very high")
# Summing amplifier mixing 3 inputs with weights 1, 2, 4 (binary DAC idea)
Rf2 = 10e3
Rs = [80e3, 40e3, 20e3]
vin = [1.0, 1.0, 0.0]
print(f"summing: Vout = {-sum(Rf2/r*v for r, v in zip(Rs, vin)):.3f} V")
# Difference amplifier with 0.1% resistors: worst-case CMRR ~ (1+G)/(4*tol)
G, tol = 1.0, 0.001
print(f"difference amp gain {G}, 0.1% resistors -> worst CMRR ~ {20*math.log10((1+G)/(4*tol)):.1f} dB")
# Integrator: R 10k, C 100 nF, input 1 V DC -> ramp rate
R, C = 10e3, 100e-9
print(f"integrator ramp {1/(R*C):.0f} V/s; unity-gain frequency {1/(2*math.pi*R*C):.1f} Hz")
print(f"add 1 Mohm across C to limit DC gain to {1e6/R:.0f} (corner {1/(2*math.pi*1e6*C):.2f} Hz)")
# inverting: gain -4.70, input resistance 10k
# non-inverting: gain 5.70, input resistance ~ very high
# summing: Vout = -0.375 V
# difference amp gain 1.0, 0.1% resistors -> worst CMRR ~ 54.0 dB
# integrator ramp 1000 V/s; unity-gain frequency 159.2 Hz
# add 1 Mohm across C to limit DC gain to 100 (corner 1.59 Hz)

Summing with 80k/40k/20k inputs weights them 1:2:4 — a crude 3-bit DAC. A discrete difference amplifier built from 0.1% resistors can have as little as 54 dB CMRR, which is why integrated difference amplifiers with laser-trimmed resistors exist. An integrator with 10 kΩ and 100 nF ramps at 1000 V/s per volt of input; a 1 MΩ resistor across C prevents offset from winding it into the rail.

Common mistakes

Applications

Key takeaways

Going further