Differential Amplifiers, CMRR & Large-Signal Behaviour

The input stage of every op-amp. Learn differential and common-mode signals, the emitter/source-coupled pair, tail current sources, differential gain (single-ended and differential output), common-mode gain and CMRR, input resistance, the tanh large-signal transfer and linear input range, degeneration for wider linear range, offset voltage from mismatch, MOSFET pairs, active (current-mirror) loads with differential-to-single-ended conversion, and why fully differential signalling rejects noise — with Python computing gains, CMRR for resistor vs current-source tails, and the current-steering curve.

A differential amplifier amplifies the difference between two inputs and ignores what they have in common. That single property rejects interference picked up equally by both wires, cancels supply noise and temperature drift, and makes DC-coupled amplification possible.

The long-tailed pair — two matched transistors sharing a tail current — is the heart of op-amps, comparators, instrumentation amplifiers, ADC front ends and high-speed serial receivers.

An analogy

A differential pair is like a balance scale with a fixed total weight (the tail current): pushing down on one side lifts the other by the same amount. If both sides are pushed equally (common mode), the balance doesn't move.

Differential and common-mode signals

Any pair of inputs can be split into a differential part (their difference) and a common-mode part (their average). Wanted signals — a sensor bridge output, a microphone on a balanced cable — are differential; interference, ground noise and supply ripple couple equally into both lines and appear as common mode. A good differential amplifier amplifies the first and rejects the second.

Small-signal analysis by half-circuits

Symmetry simplifies analysis:

Large-signal behaviour

Collector currents follow I_EE/(1 + e^(−v_id/V_T)); their difference is I_EE·tanh(v_id/2V_T). Linear range is about ±V_T (±26 mV) for a bare BJT pair, ±V_OV for a MOS pair (wider), and can be extended by emitter degeneration at the cost of gain. Large inputs switch all the current to one side — the basis of ECL/CML logic and comparators.

Mismatch, offset and CMRR limits

Real devices mismatch: V_BE differences (±1 mV typical discrete, ~0.1 mV with common-centroid layout), R_C tolerance and β mismatch create input offset voltage and offset drift, and turn common-mode signals into differential ones (limiting CMRR even with a perfect tail). CMRR also falls with frequency as tail capacitance lowers R_EE. Remedies: matched monolithic pairs, careful layout, trimming, chopper/auto-zero techniques and cascoded tails.

Formulas

Worked example: Differential gain

Given: I_EE 1 mA, R_C 10 kΩ

Find: A_d (differential and single-ended).

Answer: 193 and 96.7

Worked example: CMRR with a resistor tail

Given: Above pair, R_EE 50 kΩ

Find: CMRR (single-ended).

Answer: ≈ 59.7 dB

Worked example: Input for 90% steering

Given: BJT pair

Find: v_id where I_C1 − I_C2 = 0.9·I_EE.

Answer: ≈ 76 mV

Long-tailed pair with current-source tail

          +VCC                +VCC
           │                   │
          RC 5k               RC 5k
           ├── v_o1   v_o2 ────┤
         ┌─┘ Q1           Q2 └─┐
  v1 ────┤                     ├──── v2
         └─┐               ┌───┘
           └──────┬────────┘
                  │  I_EE = 2 mA  (current source, R_EE → very large)
                 −VEE

Both emitters share one tail current. A differential input steers current from one side to the other; a common-mode input shifts both emitters equally and — if the tail is an ideal current source — changes nothing. The finite output resistance R_EE of the tail sets the common-mode gain.

Gains, CMRR and current steering

import math
# BJT differential pair: tail current, gm, differential and common-mode gain, CMRR, linear range
VT, Itail, RC, REE, beta = 0.02585, 2e-3, 5e3, 100e3, 150
IC = Itail / 2
gm = IC / VT
Ad_single = gm * RC / 2                 # single-ended output
Ad_diff = gm * RC                       # differential output
Acm = RC / (2 * REE)                    # single-ended common-mode gain
print(f"each side IC = {IC*1e3:.1f} mA, gm = {gm*1e3:.1f} mA/V")
print(f"differential gain: {Ad_diff:.1f} (diff out), {Ad_single:.1f} (single-ended)")
print(f"common-mode gain {Acm:.3f} -> CMRR = {20*math.log10(Ad_single/Acm):.1f} dB (tail 100k)")
print(f"with a current-source tail of 10 Mohm: CMRR = {20*math.log10(Ad_single/(RC/(2*10e6))):.1f} dB")
Rid = 2 * beta / gm
print(f"differential input resistance 2*r_pi = {Rid/1e3:.1f} kohm")
for vid_mv in (10, 25, 50, 100):
    frac = math.tanh(vid_mv / 1000 / (2 * VT))
    print(f"vid = {vid_mv:3d} mV: output current steered = {frac*100:5.1f}% of tail")
# Offset from RC mismatch of 1%: Vos ~ VT * dR/R
print(f"1% RC mismatch -> input offset ~ {VT*0.01*1e3:.2f} mV")
# each side IC = 1.0 mA, gm = 38.7 mA/V
# differential gain: 193.4 (diff out), 96.7 (single-ended)
# common-mode gain 0.025 -> CMRR = 71.8 dB (tail 100k)
# with a current-source tail of 10 Mohm: CMRR = 111.8 dB
# differential input resistance 2*r_pi = 7.8 kohm
# vid =  10 mV: output current steered =  19.1% of tail
# vid =  25 mV: output current steered =  44.9% of tail
# vid =  50 mV: output current steered =  74.7% of tail
# vid = 100 mV: output current steered =  95.9% of tail
# 1% RC mismatch -> input offset ~ 0.26 mV

With a 100 kΩ resistive tail, CMRR is only ~72 dB; a transistor current source (10 MΩ) raises it by 40 dB. The pair is linear only for |v_id| of a few tens of mV: at 50 mV three quarters of the tail current is already steered, and by 100 mV the pair is essentially switched — which is exactly why it also makes a good comparator input. A 1% load mismatch produces 0.26 mV input offset.

Common mistakes

Applications

Key takeaways

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