Basic Embedded Systems interview questions

150 questions with answers (EMB-001 to EMB-150). Try each one aloud before reading the answer.

Embedded C & Bit Manipulation

EMB-001 · What does the volatile keyword do?

It tells the compiler that the value may change outside normal program flow (hardware registers, ISRs, other threads), so every access must be performed as written and must not be cached in a register or optimized away.

EMB-002 · How do you set bit n of a variable in C?

OR the variable with a mask that has only bit n set.

x |= (1U << n);

EMB-003 · How do you clear bit n of a variable?

AND the variable with the inverted mask, so only bit n becomes 0.

x &= ~(1U << n);

EMB-004 · How do you toggle bit n of a variable?

XOR the variable with the mask; XOR with 1 flips a bit and XOR with 0 leaves it unchanged.

x ^= (1U << n);

EMB-005 · How do you test whether bit n is set?

AND with the mask and check for a non-zero result.

if (x & (1U << n)) { /* bit n is 1 */ }

EMB-006 · What is a bit mask?

A constant whose set bits select the bits of interest in another value. Masks are combined with AND, OR and XOR to read, set, clear or toggle specific fields without disturbing the other bits.

EMB-007 · Why use <stdint.h> fixed-width types such as uint8_t and uint32_t?

The size of int and long varies between compilers and targets. Fixed-width types guarantee exact sizes, which matters for register access, protocol frames, memory layout and portable overflow behaviour.

EMB-008 · What is a bit-field in a C struct?

A struct member declared with an explicit width, such as unsigned mode : 3;, so several small fields pack into one word. Bit order, padding and alignment are implementation-defined, so bit-fields are risky for hardware registers and wire formats.

EMB-009 · What is the difference between logical and bitwise operators?

Logical operators (&&, ||, !) treat operands as true or false and short-circuit. Bitwise operators (&, |, ^, ~) operate on every bit independently and always evaluate both operands.

EMB-010 · What does static mean for a local variable and for a global function?

A static local variable keeps its value between calls and lives in .data or .bss, not on the stack. A static global variable or function has internal linkage, so it is visible only inside its own source file.

EMB-011 · What is the difference between #define and const?

#define is a preprocessor text substitution with no type or scope. A const variable has a type, obeys scope rules and is visible to the debugger. In C, a const variable is not a constant expression, so it cannot size a file-scope array.

EMB-012 · What is endianness?

The byte order of multi-byte values in memory. Little-endian stores the least significant byte at the lowest address; big-endian stores the most significant byte first. Most Cortex-M devices run little-endian, while network protocols use big-endian.

EMB-013 · Why are unsigned types preferred for bit manipulation?

Right-shifting a negative signed value is implementation-defined, and left-shifting into the sign bit is undefined behaviour. Unsigned types give well-defined wrap-around and logical shifts, so masks such as 1U << 31 behave predictably.

Pointers, Memory & Linker Scripts

EMB-014 · What is a pointer?

A variable that holds the memory address of another object or function. Dereferencing it with * accesses the object at that address, and pointer arithmetic moves in units of the pointed-to type's size.

EMB-015 · What is a null pointer?

A pointer that compares equal to NULL and points to no valid object. Dereferencing it is undefined behaviour; on many Cortex-M parts address 0 is valid flash, so the bug may silently read the vector table instead of faulting.

EMB-016 · What is a dangling pointer?

A pointer that still holds the address of an object whose lifetime has ended, such as a freed heap block or a returned local variable. Using it reads or corrupts memory now owned by something else.

EMB-017 · What is a void * pointer?

A generic pointer that can hold the address of any object type. It cannot be dereferenced or used in arithmetic until it is cast to a concrete type; it is common in APIs such as memcpy and RTOS queues.

EMB-018 · What is a function pointer?

A pointer that stores the address of a function, used for callbacks, state machines, jump tables and vector tables.

void (*handler)(void) = led_on;
handler();

EMB-019 · What is the difference between the stack and the heap?

The stack holds local variables, return addresses and saved registers; it is allocated automatically and grows and shrinks with calls. The heap is allocated manually with malloc and free, can fragment, and has non-deterministic timing.

EMB-020 · What are the .text, .data and .bss sections?

.text holds code and constant data in flash. .data holds initialised globals: their initial values sit in flash and are copied to RAM at startup. .bss holds zero-initialised globals in RAM, which the startup code clears.

EMB-021 · What is a linker script?

A file that tells the linker the memory regions (flash, RAM addresses and sizes) and how to place each section into them. It also defines symbols such as _estack and _sidata that the startup code uses.

EMB-022 · What is a memory map?

The layout of the address space showing where flash, SRAM, peripherals and system registers live. On Cortex-M the 4 GB space is divided into fixed regions, for example code from 0x0000_0000 and SRAM from 0x2000_0000.

EMB-023 · What is the difference between flash and RAM in a microcontroller?

Flash is non-volatile, holds code and constants, is erased in sectors and has limited write endurance. SRAM is volatile, fast, byte-writable and holds the stack, heap and variables.

EMB-024 · How do you access a memory-mapped peripheral register in C?

Cast its fixed address to a pointer to a volatile integer and dereference it. The address below is only an example.

#define GPIO_ODR (*(volatile uint32_t *)0x40020014U)
GPIO_ODR |= (1U << 5);

EMB-025 · Why is dynamic memory allocation discouraged in embedded firmware?

malloc has non-deterministic timing, can fail at run time and fragments a small heap until large requests fail. Safety guidelines such as MISRA C restrict it, so designs prefer static allocation or fixed-size memory pools.

EMB-026 · What is a map file?

A linker output that lists every section, symbol and object file with its address and size. It is used to check flash and RAM usage, find large functions and verify that data landed in the intended memory region.

Microcontroller Architecture (ARM Cortex-M)

EMB-027 · What is an embedded system?

A computer system dedicated to a specific function within a larger mechanical or electrical system, usually with real-time, power, cost and size constraints. Examples include engine controllers, pacemakers and washing machines.

EMB-028 · What is the difference between a microprocessor and a microcontroller?

A microprocessor (MPU) is mainly a CPU and needs external memory and peripherals. A microcontroller (MCU) integrates the CPU, flash, RAM and peripherals such as timers, ADCs and UARTs on one chip, giving low cost and low power.

EMB-029 · What is the difference between Harvard and von Neumann architecture?

Harvard architecture has separate instruction and data buses, so fetches and data accesses can happen at the same time. Von Neumann uses one shared memory and bus for both. Cortex-M3/M4 use a Harvard bus interface over a single unified address map.

EMB-030 · What is the ARM Cortex-M family?

ARM's 32-bit processor cores for microcontrollers, such as Cortex-M0/M0+ (smallest, lowest power), M3, M4 (DSP and optional FPU), M7 (highest performance) and M23/M33 (Armv8-M with TrustZone). They share the NVIC and Thumb instruction set.

EMB-031 · What is the difference between RISC and CISC?

RISC uses a small set of simple, fixed-length instructions with load/store memory access, which suits pipelining. CISC has many complex, variable-length instructions that can operate directly on memory. ARM is RISC; x86 is CISC.

EMB-032 · What is the NVIC?

The Nested Vectored Interrupt Controller built into Cortex-M cores. It enables, prioritises and masks interrupts, supports nesting by priority, and fetches the handler address directly from the vector table for low latency.

EMB-033 · What is SysTick?

A 24-bit down-counting timer built into the Cortex-M core. It is typically configured to interrupt every 1 ms to provide the RTOS tick or a HAL time base, and it is portable across vendors.

EMB-034 · What are the main core registers of a Cortex-M CPU?

R0–R12 general-purpose registers, R13 the stack pointer (MSP or PSP), R14 the link register holding the return address, R15 the program counter, and xPSR holding flags and the exception number.

EMB-035 · What is the vector table?

A table of addresses at the start of the boot image. On Cortex-M, entry 0 is the initial stack pointer, entry 1 is the reset handler, and the following entries are the fault, system and peripheral interrupt handlers. It can be relocated through VTOR on most cores.

EMB-036 · What instruction set do Cortex-M cores execute?

Only the Thumb instruction set (Thumb-2 on M3 and above), a mix of 16-bit and 32-bit instructions that gives good code density. They cannot execute 32-bit ARM-state instructions, so function addresses have bit 0 set.

EMB-037 · What is a PLL in an MCU clock tree?

A phase-locked loop multiplies a slower reference clock, such as an 8 MHz crystal, up to the high core frequency. The clock tree then uses prescalers to derive the bus and peripheral clocks from it.

EMB-038 · What does a Cortex-M core do immediately after reset?

It reads the initial main stack pointer from address 0x0000_0000 and the reset handler address from 0x0000_0004 (subject to any boot remapping), then starts executing the reset handler in Thread mode with privileged access.

EMB-039 · What is an FPU and which Cortex-M cores can have one?

A floating-point unit performs floating-point arithmetic in hardware. It is optional on Cortex-M4, M7 and M33; on cores without one, such as M0 and M3, floating-point operations are emulated in slower software libraries.

GPIO, Timers & PWM

EMB-040 · What is GPIO?

General-purpose input/output: a pin that software can configure as a digital input or output, with options for pull resistors, output type, speed and alternate peripheral functions.

EMB-041 · What is the difference between push-pull and open-drain outputs?

A push-pull output actively drives both high and low. An open-drain output can only pull low and needs an external or internal pull-up to go high, which allows wired-AND buses such as I2C and level shifting.

EMB-042 · Why are pull-up and pull-down resistors used?

They hold an input at a defined logic level when nothing drives it, preventing a floating pin from picking up noise and toggling randomly. A pull-up defaults the pin high and a pull-down defaults it low.

EMB-043 · What is switch debouncing?

Mechanical contacts bounce for a few milliseconds when pressed, creating multiple edges. Debouncing filters these, either with an RC filter and Schmitt trigger or in software by accepting a new state only after it is stable for about 10–50 ms.

EMB-044 · What is a hardware timer?

A peripheral counter clocked from a system clock through a prescaler. It counts up or down to a reload value and can generate interrupts, PWM outputs, input captures and DMA triggers without CPU involvement.

EMB-045 · What is a timer prescaler?

A divider placed before the timer counter that reduces the input clock frequency. Timer tick frequency = f_clk / (PSC + 1) on many MCUs, which lets a 16-bit counter measure longer intervals.

EMB-046 · What is PWM?

Pulse-width modulation: a fixed-frequency square wave whose high time is varied. The average voltage is proportional to the duty cycle, so PWM controls LED brightness, motor speed and power converters efficiently.

EMB-047 · What is duty cycle?

The fraction of each period that a signal is high: D = t_on / T × 100%. A 3.3 V PWM at 25% duty has an average of 0.825 V.

EMB-048 · What is timer input capture?

A mode where a pin edge causes the timer to copy its current count into a capture register. Comparing two captures gives the period, frequency or pulse width of an external signal.

EMB-049 · What is timer output compare?

A mode where the timer compares its counter with a compare register and, on a match, sets, clears or toggles an output pin or raises an interrupt. It generates precise pulses and is the basis of PWM.

EMB-050 · What is an alternate function on a GPIO pin?

A setting that connects the pin to an internal peripheral, such as a UART TX, SPI clock or timer channel, instead of the GPIO output register. A pin multiplexer selects which function owns the pin.

EMB-051 · What does the GPIO speed or slew-rate setting control?

How fast the output driver switches between levels. Faster edges support high-frequency signals but increase EMI, ringing and current spikes, so the lowest adequate speed should be chosen.

EMB-052 · What is a timer update or overflow event?

The event raised when the counter wraps from its reload value back to zero (or reaches zero when counting down). It is used for periodic interrupts and marks the start of each PWM period.

ADC, DAC & Sensors Interfacing

EMB-053 · What is an ADC?

An analog-to-digital converter that samples an analog voltage and outputs a proportional digital code. Key parameters are resolution, sampling rate, reference voltage and accuracy.

EMB-054 · What is ADC resolution?

The number of output bits N, giving 2ᴺ codes. The voltage per step is 1 LSB = V_ref / 2ᴺ; a 12-bit ADC with 3.3 V reference resolves about 0.806 mV.

EMB-055 · What is a DAC?

A digital-to-analog converter that turns a digital code into a proportional voltage or current: V_out = code × V_ref / 2ᴺ. It is used for audio, waveform generation and setting analog reference levels.

EMB-056 · What is the Nyquist sampling criterion?

To reconstruct a signal without aliasing, the sampling rate must exceed twice the highest frequency component: f_s > 2·f_max. In practice designers sample several times faster and add an anti-aliasing filter.

EMB-057 · What is quantization error?

The difference between the true analog value and the nearest digital code. For an ideal ADC it is at most ±½ LSB and limits the ideal SNR to about 6.02·N + 1.76 dB.

EMB-058 · What is a SAR ADC?

A successive-approximation ADC that uses a DAC and comparator in a binary search, deciding one bit per clock from MSB to LSB. It offers medium speed and resolution at low power and is the most common MCU ADC.

EMB-059 · What is the ADC reference voltage?

The voltage that defines the full-scale input range. The conversion result is code = V_in / V_ref × (2ᴺ − 1), so any noise or drift on V_ref directly changes every reading.

EMB-060 · What is aliasing?

When a signal above half the sampling rate is sampled, it appears as a false lower frequency that cannot be separated from real content. An analog low-pass anti-aliasing filter before the ADC prevents it.

EMB-061 · What is the difference between analog and digital sensors?

An analog sensor outputs a voltage or current that needs an ADC and signal conditioning. A digital sensor contains its own ADC and processing and reports values over I2C, SPI, UART or a pulse interface.

EMB-062 · What is an NTC thermistor?

A resistor whose resistance falls as temperature rises, in a strongly non-linear way. It is read through a voltage divider and ADC, then converted to temperature with the Beta or Steinhart–Hart equation or a lookup table.

EMB-063 · What is a sample-and-hold circuit?

A switch and capacitor that captures the input voltage and holds it steady while the ADC converts. The sampling time must be long enough for the capacitor to charge through the source impedance.

EMB-064 · What is the difference between single-ended and differential ADC inputs?

A single-ended input measures a voltage relative to ground. A differential input measures the difference between two pins, rejecting common-mode noise and allowing small bridge signals to be measured accurately.

EMB-065 · Why do sensors need calibration?

Real sensors have offset, gain and non-linearity errors that vary between units and with temperature. Calibration measures known reference points and stores correction coefficients so firmware can correct raw readings.

Interrupts & Exceptions

EMB-066 · What is an interrupt?

A hardware or software signal that makes the CPU suspend the current code, save context and run a handler for the event. When the handler finishes, execution resumes where it stopped.

EMB-067 · What is an ISR?

An interrupt service routine: the function the CPU runs in response to a specific interrupt. Its address is stored in the vector table, and on Cortex-M it can be a normal C function because the hardware saves the caller-saved registers.

EMB-068 · What is the difference between polling and interrupts?

Polling repeatedly checks a status flag in a loop, which is simple but wastes CPU time and can miss short events. Interrupts let the hardware notify the CPU only when the event happens, saving power and improving response time.

EMB-069 · What is interrupt latency?

The time from the interrupt request to the first instruction of the ISR. On Cortex-M3/M4 it is typically 12 cycles with zero-wait-state memory, but it grows with masked sections, higher-priority ISRs and memory wait states.

EMB-070 · What is the difference between maskable and non-maskable interrupts?

Software can disable or defer a maskable interrupt. A non-maskable interrupt (NMI) cannot be disabled by normal masking and is reserved for critical events such as clock failure or power loss.

EMB-071 · What is interrupt priority?

A number that decides which interrupt runs first when several are pending and whether one can preempt another. On Cortex-M a lower numeric value means a higher priority.

EMB-072 · What is the difference between an exception and an interrupt on Cortex-M?

"Exception" is the general term for any event that changes normal flow. System exceptions come from the core, such as Reset, NMI, HardFault, SVCall, PendSV and SysTick. Interrupts (IRQs) are exceptions raised by peripherals.

EMB-073 · What is a HardFault?

A Cortex-M exception raised for serious errors such as invalid memory access, undefined instructions, or a fault escalated because its own handler is disabled. It indicates a firmware bug that must be diagnosed from the stacked registers and fault status registers.

EMB-074 · What is an interrupt pending flag?

A status bit set by hardware when an interrupt event occurs. The ISR usually must clear the peripheral's flag, otherwise the interrupt is re-entered immediately after returning.

EMB-075 · What is the difference between edge-triggered and level-triggered interrupts?

An edge-triggered interrupt fires once on a transition (rising or falling). A level-triggered interrupt stays asserted as long as the line is at the active level, so the source must be cleared before the ISR returns.

EMB-076 · What are nested interrupts?

Allowing a higher-priority interrupt to preempt an ISR that is already running. The Cortex-M NVIC supports nesting in hardware based on configured priorities.

EMB-077 · What is a critical section?

A code region that must run without interruption, usually because it accesses shared data. On bare metal it is often protected by briefly disabling interrupts.

__disable_irq();
shared_count++;
__enable_irq();

EMB-078 · What is an external interrupt (EXTI)?

An interrupt triggered by an edge on a GPIO pin, used for buttons, sensor data-ready signals and wake-up events. The edge sensitivity and pin mapping are configured in the external interrupt controller.

Communication Protocols (UART, SPI, I2C, CAN, USB)

EMB-079 · What is UART?

Universal asynchronous receiver-transmitter: a serial interface that sends data over TX and RX lines without a shared clock. Both sides must agree on baud rate and frame format, and it is point-to-point.

EMB-080 · What is baud rate?

The number of symbols transmitted per second on a serial line. For UART each symbol is one bit, so 115200 baud with 8N1 framing (10 bits per byte) carries about 11,520 bytes/s.

EMB-081 · What does a UART frame consist of?

An idle-high line, one start bit (low), 5–9 data bits sent LSB first, an optional parity bit and 1 or 2 stop bits (high). The most common format is 8N1: 8 data bits, no parity, 1 stop bit.

EMB-082 · What is SPI?

Serial Peripheral Interface: a synchronous, full-duplex bus where a master drives SCLK and exchanges data on MOSI and MISO. Each slave has its own chip-select line, and speeds of tens of MHz are common.

EMB-083 · What is I2C?

Inter-Integrated Circuit: a synchronous two-wire bus (SDA and SCL) with open-drain lines and pull-ups. Devices are selected by a 7-bit (or 10-bit) address, and standard speeds are 100 kHz, 400 kHz and 1 MHz.

EMB-084 · What is the CAN bus?

Controller Area Network: a differential two-wire, multi-master bus used in vehicles and industry. Messages carry identifiers instead of addresses, priority is resolved by bitwise arbitration, and it has strong error detection. Classical CAN runs up to 1 Mbit/s.

EMB-085 · What is USB?

Universal Serial Bus: a host-controlled, differential serial interface with a host polling devices. Devices declare their capabilities through descriptors and use standard classes such as CDC, HID and mass storage. Full speed is 12 Mbit/s and high speed is 480 Mbit/s.

EMB-086 · What is the difference between synchronous and asynchronous serial communication?

Synchronous links (SPI, I2C) send a clock signal along with the data, so the receiver samples on clock edges. Asynchronous links (UART) have no clock; the receiver re-synchronises on each start bit using an agreed baud rate.

EMB-087 · What is the difference between full-duplex and half-duplex?

Full-duplex sends and receives at the same time on separate paths, as in SPI and UART. Half-duplex uses one shared path in one direction at a time, as in I2C and RS-485 two-wire.

EMB-088 · What is the difference between RS-232 and RS-485?

RS-232 is single-ended and point-to-point over short distances, using bipolar voltage levels. RS-485 is differential and multi-drop, supporting many nodes over long cables of around 1200 m at lower speeds, and is widely used in industrial networks such as Modbus RTU.

EMB-089 · What is a parity bit?

An extra bit added so the total number of 1s is even (even parity) or odd (odd parity). It detects any single-bit error but cannot correct errors or detect an even number of flipped bits.

EMB-090 · What are ACK and NACK in I2C?

After every byte the receiver drives SDA during a ninth clock pulse: low means ACK (byte accepted) and high means NACK. A NACK after the address byte means no device responded; a master sends NACK to end a read.

RTOS Concepts

EMB-091 · What is an RTOS?

A real-time operating system that schedules multiple tasks with deterministic, bounded timing. It provides task management, priority-based preemption, timing services and synchronisation primitives. Examples are FreeRTOS, Zephyr, ThreadX and VxWorks.

EMB-092 · What is a task in an RTOS?

An independent thread of execution with its own stack, priority and saved context, usually written as an infinite loop. The scheduler decides which ready task runs on the CPU.

EMB-093 · What are the typical RTOS task states?

Running (executing now), Ready (able to run, waiting for the CPU), Blocked (waiting for an event, delay or resource) and Suspended (explicitly removed from scheduling). Some kernels also have a Deleted or Dormant state.

EMB-094 · What is the scheduler?

The kernel component that selects which ready task runs next. Most RTOS schedulers are priority-based and preemptive, often with round-robin time slicing among tasks of equal priority.

EMB-095 · What is the difference between preemptive and cooperative scheduling?

In preemptive scheduling the kernel can stop a running task as soon as a higher-priority task becomes ready. In cooperative scheduling a task keeps the CPU until it yields or blocks, which is simpler but gives worse response times.

EMB-096 · What is a context switch?

Saving the CPU registers and stack pointer of the current task and restoring those of the next task, so it resumes exactly where it stopped. On Cortex-M it is usually done in the PendSV handler.

EMB-097 · What is a semaphore?

A kernel object with a count, used for signalling and resource counting. Tasks "take" it (decrement or block at zero) and "give" it (increment). A binary semaphore has only the values 0 and 1.

EMB-098 · What is a mutex?

A mutual-exclusion lock owned by the task that takes it, which only that task may release. It protects shared resources and usually supports priority inheritance to limit priority inversion.

EMB-099 · What is a message queue?

A kernel FIFO that passes fixed-size messages between tasks or from ISRs to tasks. Senders block when it is full and receivers block when it is empty, which decouples producers from consumers safely.

EMB-100 · What is the difference between hard and soft real-time?

In a hard real-time system a missed deadline is a failure, as in airbag deployment or motor commutation. In a soft real-time system occasional misses only degrade quality, as in audio or video streaming.

EMB-101 · What is the RTOS tick?

A periodic timer interrupt, often 1 ms from SysTick, that advances kernel time, wakes delayed tasks and triggers time-slice switches. Its rate sets the resolution of time-based delays.

EMB-102 · What is the idle task?

The lowest-priority task the kernel creates, which runs when no other task is ready. It often frees resources of deleted tasks and is the natural place to enter low-power sleep.

Bootloaders & Firmware Updates

EMB-103 · What is firmware?

Software stored in non-volatile memory, such as flash, that directly controls a device's hardware. It runs from power-up, often without an operating system.

EMB-104 · What is a bootloader?

A small program that runs first after reset. It initialises minimal hardware, decides whether to stay in update mode, validates the application image and then jumps to it.

EMB-105 · What is an OTA update?

An over-the-air firmware update delivered over a wireless link such as Wi-Fi, BLE or cellular. The device downloads the image, verifies it and lets the bootloader install it, ideally with rollback if it fails.

EMB-106 · What is DFU?

Device Firmware Upgrade: a mode or protocol for loading new firmware into a device, most commonly the USB DFU class. Many MCUs include a ROM bootloader that supports DFU over USB, UART or other interfaces.

EMB-107 · What is in-system programming (ISP)?

Programming a device's flash while it is soldered on the board, through a debug port (SWD, JTAG) or a serial bootloader. It removes the need to program chips before assembly.

EMB-108 · What is the difference between a .bin file and an Intel .hex file?

A .bin file is a raw byte image with no address information, so the load address must be supplied separately. An Intel HEX file is ASCII text with address records and per-line checksums, so it can describe gaps and multiple regions.

EMB-109 · Why does a bootloader check a CRC before jumping to the application?

A CRC over the image detects corruption from an interrupted update or flash errors. If the stored and computed values do not match, the bootloader stays in update mode instead of executing broken code.

EMB-110 · How is flash memory erased and written?

Flash must be erased in pages or sectors (setting bits to 1) before it is programmed; programming can only change bits from 1 to 0, in fixed units such as words. Each sector withstands a limited number of erase cycles.

EMB-111 · What is the startup code?

Code that runs before main(): it sets the stack pointer, copies .data from flash to RAM, zeroes .bss, configures clocks or the FPU if needed, runs C/C++ initialisers and then calls main().

EMB-112 · Why should firmware images carry a version number?

The version lets the bootloader and update server decide whether an image is newer, block downgrades to vulnerable versions, and lets support teams identify exactly which build a field device runs.

EMB-113 · What is a ROM (system) bootloader?

A bootloader burned into the MCU's read-only memory by the manufacturer. It is selected by boot pins or option bytes and lets a blank or bricked chip be programmed over UART, USB, CAN or other interfaces.

EMB-114 · What is A/B (dual-bank) firmware?

A layout with two application slots: the new image is written to the inactive slot while the old one stays intact. The bootloader switches to the new slot only after it validates, and can fall back if the new image fails.

Low-Power Design

EMB-115 · Why is low-power design important in embedded systems?

Many devices run from batteries or energy harvesting and must last months or years. Lower power also reduces heat, power-supply cost and size.

EMB-116 · What is a sleep mode?

A low-power state in which the CPU clock stops while selected peripherals and memory keep running. An interrupt or event wakes the core quickly to resume execution.

EMB-117 · How do sleep, stop and standby modes typically differ?

In sleep only the CPU halts, giving fast wake-up. In stop most clocks halt but RAM and registers are kept, giving microamp current. In standby almost everything is powered off, RAM is usually lost and wake-up resembles a reset. Exact names vary by vendor.

EMB-118 · What is clock gating?

Switching off the clock to unused peripherals or logic blocks so they stop toggling and consume no dynamic power. MCUs expose it through peripheral clock-enable registers.

EMB-119 · What is dynamic power in CMOS?

The power used to charge and discharge capacitances when signals switch: P_dyn = α·C·V²·f, where α is the activity factor. Lowering voltage gives the largest saving because of the squared term.

EMB-120 · What is static (leakage) power?

Power drawn by transistor leakage currents even when nothing switches. It grows with temperature and smaller process nodes and dominates in deep sleep, so it is cut by powering domains off entirely.

EMB-121 · What is a wake-up source?

An event that brings the MCU out of a low-power mode, such as an RTC alarm, GPIO edge, UART activity, comparator trip or watchdog. Only sources that remain powered in the chosen mode can wake it.

EMB-122 · What is the difference between WFI and WFE on Cortex-M?

WFI (Wait For Interrupt) sleeps until an interrupt becomes pending. WFE (Wait For Event) sleeps until an event occurs, such as an SEV instruction or an event signal, and returns immediately if the event register is already set.

EMB-123 · Why is a real-time clock (RTC) useful in low-power systems?

The RTC runs from a 32.768 kHz crystal with very low current and keeps time while the rest of the chip sleeps. Its alarms and periodic wake-ups let the system sleep between scheduled tasks.

EMB-124 · How do you estimate battery life?

Divide the usable battery capacity by the average current: life (h) = capacity (mAh) / I_avg (mA). A 1000 mAh cell at 50 µA average lasts about 20,000 h (around 2.3 years), before derating for self-discharge and temperature.

EMB-125 · What is a brown-out detector?

A circuit that monitors the supply voltage and holds the MCU in reset or raises an interrupt when it falls below a threshold. It prevents erratic execution and corrupted flash writes at low voltage.

EMB-126 · What is the difference between an LDO and a DC-DC converter?

An LDO is a linear regulator that is simple, quiet and cheap, but its efficiency is roughly V_out / V_in. A switching DC-DC converter can reach high efficiency over a wide range but adds ripple, noise and components.

Debugging & Testing

EMB-127 · What is JTAG?

An IEEE 1149.1 test and debug interface using TCK, TMS, TDI, TDO and optional TRST. It supports boundary scan, flash programming and CPU debugging, and multiple devices can be chained.

EMB-128 · What is SWD?

Serial Wire Debug: ARM's two-pin debug interface (SWDIO and SWCLK) for Cortex cores. It provides the same core debug access as JTAG with fewer pins and can add SWO for trace output.

EMB-129 · What is the difference between hardware and software breakpoints?

A hardware breakpoint uses a comparator in the debug unit and works in flash, but only a few are available. A software breakpoint replaces an instruction with a BKPT instruction, so it needs writable memory such as RAM.

EMB-130 · What is a watchpoint?

A debugger trigger that halts the CPU when a specific memory address is read or written. It is ideal for finding which code corrupts a variable and uses the core's data watchpoint unit.

EMB-131 · What is a logic analyzer used for?

Capturing many digital signals at once and decoding protocols such as UART, SPI, I2C and CAN. It shows timing relationships between signals but not analog levels.

EMB-132 · What is an oscilloscope used for in firmware debugging?

Viewing analog waveforms over time: signal integrity, rise times, ringing, supply noise and timing. Toggling a GPIO around code sections and measuring it on a scope is a simple way to time ISRs.

EMB-133 · What is unit testing in embedded firmware?

Testing individual modules in isolation, often on the host PC with hardware access replaced by mocks or stubs. Frameworks such as Unity, CppUTest and GoogleTest are common.

EMB-134 · What is hardware-in-the-loop (HIL) testing?

Testing real controller hardware and firmware against a simulated plant that generates sensor signals and reads actuator outputs in real time. It allows repeatable and fault-injection testing without the real system.

EMB-135 · What is semihosting?

A debug mechanism in which the target's I/O calls, such as printf, are executed by the host through the debugger. It is convenient but very slow and halts the target, and the target hangs if no debugger is attached.

EMB-136 · What is a debug probe?

A hardware adapter, such as ST-LINK, J-Link or CMSIS-DAP, that connects the host debugger to the target's SWD or JTAG port. It handles flash programming, breakpoints, memory access and sometimes trace.

EMB-137 · What is static analysis?

Examining source code without running it to find bugs, undefined behaviour and coding-standard violations. Tools such as cppcheck, clang-tidy, PC-lint and Polyspace are used, often to check MISRA C compliance.

EMB-138 · What is an assertion?

A run-time check that a condition the programmer believes must be true actually holds, such as assert(ptr != NULL). On failure, embedded systems typically log the file and line and halt or reset.

Embedded Linux, Safety & Security

EMB-139 · What is embedded Linux?

The Linux kernel and a minimal user space running on an embedded processor with an MMU, such as a Cortex-A. It gives networking, file systems and drivers but needs more memory and boots slower than an RTOS.

EMB-140 · What is a device tree?

A data structure, written as .dts and compiled to a .dtb, that describes the board's hardware (memory, peripherals, interrupts, pins) to the Linux kernel. It lets one kernel binary support many boards.

EMB-141 · What is the difference between kernel space and user space?

Kernel space runs privileged code with full hardware access, including drivers and the scheduler. User space runs applications in protected virtual memory, and they reach hardware only through system calls and device files.

EMB-142 · What is a device driver?

Software that controls a hardware device and exposes a standard interface to higher layers. In Linux, drivers are character, block or network drivers, often built as loadable kernel modules.

EMB-143 · What is U-Boot?

A widely used open-source bootloader for embedded Linux. It initialises DRAM and clocks, loads the kernel, device tree and initramfs from storage or the network, and passes boot arguments to the kernel.

EMB-144 · What are Yocto and Buildroot?

Build systems that cross-compile a complete embedded Linux image: toolchain, kernel, bootloader and root file system. Buildroot is simpler and faster for small images; Yocto uses layers and recipes and suits large, maintained product lines.

EMB-145 · What is MISRA C?

A set of coding guidelines from the Motor Industry Software Reliability Association that restrict risky C features to improve safety, security and portability. Rules are classified as mandatory, required or advisory.

EMB-146 · What is ISO 26262?

The international functional-safety standard for electrical and electronic systems in road vehicles. It defines a safety lifecycle, hazard analysis and risk assessment, ASIL classification and requirements for hardware and software development.

EMB-147 · What is an ASIL?

Automotive Safety Integrity Level from ISO 26262, ranging from A (lowest) to D (highest), with QM for non-safety items. It is set by the severity, exposure and controllability of a hazard and decides how rigorous development must be.

EMB-148 · What is functional safety?

The part of overall safety that depends on a system responding correctly to its inputs, including detecting faults and moving to a safe state. IEC 61508 is the generic standard, and ISO 26262 adapts it for automotive.

EMB-149 · What is secure boot?

A boot process in which each stage verifies the cryptographic signature of the next image before running it, starting from an immutable root of trust in ROM or OTP. It prevents unauthorised or tampered firmware from executing.

EMB-150 · What is a root file system in embedded Linux?

The file system mounted at / that holds user-space programs, libraries, configuration and init scripts. It may be stored on eMMC, NAND, SD card or loaded into RAM as an initramfs.

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