Failure Analysis, ESD Handling & Lab Safety

Finding out why devices died — and not killing them in the first place. Learn failure modes (opens, shorts, leakage, parametric drift, breakdown, thermal and package failures) and the failure-analysis flow (electrical verification, curve tracing, optical/X-ray inspection, acoustic microscopy, thermal/emission microscopy, decapsulation, cross-sectioning, SEM/EDX), ESD physics and models (HBM, CDM, historical MM, IEC 61000-4-2 system level), ESD-safe workstations, wrist straps, grounding and packaging, moisture sensitivity levels and baking, and laboratory safety with semiconductors (high voltage, stored energy, laser safety, hot surfaces, batteries, power-device explosions, safe probing, isolation, PPE, discharge procedures) — with Python computing ESD currents/energies and capacitor-bank discharge times.

When a device fails, understanding the root cause prevents recurrence: was it a design weakness, a manufacturing defect, electrical overstress, ESD, or wear-out? Failure analysis follows a disciplined, non-destructive-first flow.

Many 'mysterious' failures are ESD or electrical overstress during handling or operation; many lab injuries come from stored energy and high voltage in power electronics.

An analogy

Failure analysis is forensic science: document the scene (electrical signature), take X-rays before surgery (non-destructive imaging), then carefully dissect (decap, cross-section) to find the cause of death.

Failure signatures

Electrical symptoms point to causes:

ESD protection and handling

Components are rated by HBM (typically 1–2 kV) and CDM (250–500 V) sensitivity; systems by IEC 61000-4-2 (±8 kV contact). Protect with an EPA: grounded wrist straps and heel straps, dissipative mats and flooring, ionisers for insulators, ESD-safe packaging (shielding bags), and procedures (ANSI/ESD S20.20, IEC 61340-5-1). Sensitive devices include MOSFET gates, RF parts, laser diodes and CMOS ICs.

Moisture and handling

Plastic packages absorb moisture; during reflow it vaporises and delaminates or cracks the package. MSL 1 (unlimited floor life) to MSL 6 (bake before use). Dry-pack bags with desiccant and humidity cards; bake exposed parts per J-STD-033 (e.g. 125 °C for tens of hours). Handle bare dies and wafers with clean tools and gloves.

Lab safety

High voltage and stored energy (DC links, capacitor banks) — use bleeders, discharge tools, lock-out/tag-out, and verify zero voltage. Power-device failures can explode — use enclosures, current limits and eye protection. Isolated/differential probes for floating measurements; never float oscilloscopes. Laser diodes: class-appropriate eyewear and interlocks. Hot heatsinks and soldering irons; lithium batteries (thermal runaway). One hand rule, proper PPE and working with a colleague when handling hazardous voltages.

Formulas

Worked example: HBM current

Given: 4 kV HBM

Find: Peak current.

Answer: 2.7 A

Worked example: Stored energy

Given: 470 µF at 350 V

Find: E.

Answer: 28.8 J

Worked example: Discharge time

Given: τ 5 s, 350 → 30 V

Find: t.

Answer: 12.3 s

Failure-analysis flow

  1. Record history & symptom (when, conditions, lot, mission)
  2. Electrical verification: curve tracer / SMU I–V on each pin pair vs good unit
  3. Non-destructive: optical, X-ray (wires, voids), acoustic microscopy (delamination)
  4. Fault isolation: thermal imaging / lock-in thermography, photon emission (OBIRCH)
  5. Decapsulation (chemical/laser), optical & SEM inspection, EDX for contamination
  6. Cross-section / FIB at the hot spot → physical root cause
  7. Report: mechanism (EOS, ESD, defect, wear-out) → corrective action

Always compare with a known-good device and preserve evidence: destructive steps are irreversible. Electrical signatures narrow the location (which pins, which junction); hot-spot techniques pinpoint it; physical analysis confirms the mechanism.

ESD energy and safe discharge

import math
# ESD models (HBM), energy, capacitor bank safe discharge, MSL floor life
C_hbm, R_hbm = 100e-12, 1500.0
for V in (2000, 8000):
    print(f"HBM {V} V: peak current {V/R_hbm:.2f} A, energy {0.5*C_hbm*V**2*1e3:.2f} mJ, time constant {R_hbm*C_hbm*1e9:.0f} ns")
C_dev, V_dev = 10e-12, 500.0
print(f"CDM: a 10 pF package charged to 500 V holds {0.5*C_dev*V_dev**2*1e6:.2f} uJ, discharged in <1 ns -> peak currents of several A")
C_bank, V0, R_bleed, V_safe = 1000e-6, 400.0, 10e3, 50.0
t = R_bleed * C_bank * math.log(V0 / V_safe)
print(f"1000 uF at 400 V with 10k bleeder: stored {0.5*C_bank*V0**2:.0f} J, {t:.0f} s to fall below 50 V")
print(f"energy still stored at 50 V: {0.5*C_bank*V_safe**2:.2f} J")
# HBM 2000 V: peak current 1.33 A, energy 0.20 mJ, time constant 150 ns
# HBM 8000 V: peak current 5.33 A, energy 3.20 mJ, time constant 150 ns
# CDM: a 10 pF package charged to 500 V holds 1.25 uJ, discharged in <1 ns -> peak currents of several A
# 1000 uF at 400 V with 10k bleeder: stored 80 J, 21 s to fall below 50 V
# energy still stored at 50 V: 1.25 J

A 2 kV human-body discharge drives 1.3 A for ~150 ns — enough to rupture thin gate oxides without on-chip protection. CDM events are smaller in energy but sub-nanosecond, stressing gate oxides differently. A 1000 µF, 400 V DC-link capacitor stores 80 J and takes ~21 s to fall below 50 V through a 10 kΩ bleeder — always verify with a meter before touching.

Common mistakes

Applications

Key takeaways

Going further