6.1 Combinational Circuit: Output as a Pure Function of Current Inputs

Define a combinational circuit precisely as output = f(current inputs), distinguish it from a memory-holding sequential circuit, and recognize adders, subtractors, multiplexers, decoders, and comparators as canonical combinational building blocks.

A combinational circuit is a digital circuit whose output at any instant depends only on the values of its inputs at that same instant, with no dependence whatsoever on any past input history or internal stored state. This is the defining property that separates Module 6's entire topic list — adders, subtractors, comparators, multiplexers, decoders, encoders — from the sequential circuits (latches, flip-flops, counters, registers) covered later in the course: a combinational circuit has no memory, so applying the same input combination always produces exactly the same output, instantly (aside from real gate propagation delay), regardless of what happened before.

The core definition: Output = f(Current Inputs)

The formal statement of combinational behavior is Output = f(Current Inputs) — the output is a pure Boolean function of the present input values only. There is no clock signal required to update the output, no internal state variable that the circuit remembers between evaluations, and no dependence on the sequence of past inputs. If you apply input combination X to a combinational circuit at 9:00 AM and again at 5:00 PM, with nothing else about the circuit changed, you get exactly the same output both times.

Structurally, this means a combinational circuit is built purely from logic gates wired directly from inputs toward outputs, with no feedback path that routes an output (or an internal signal) back around into an input in a way that lets the circuit 'remember' anything. Every one of Boolean algebra's laws, every minterm/maxterm expansion, and every K-map minimization technique from Modules 4 and 5 exists specifically to design and simplify exactly this class of circuit.

Canonical examples

The spec lists five canonical combinational building blocks that this module covers in depth: the adder (binary addition), the subtractor (binary subtraction), the multiplexer (data selection), the decoder (code translation to one-of-many outputs), and the comparator (relative magnitude testing). Each of these is a pure function of its current inputs — a full adder's SUM and CARRY OUT depend only on A, B, and Cin at this instant, never on what A, B, or Cin were a moment earlier.

These five blocks are not arbitrary examples; they are the arithmetic and data-routing backbone of every digital system built from Module 6 onward. An ALU (arithmetic logic unit) is, at its core, a carefully organized collection of adders, subtractors, and comparators; a datapath's routing between functional units is built from multiplexers, decoders, and demultiplexers.

• Adder — computes the sum of binary values • Subtractor — computes the difference of binary values • Multiplexer — selects one of several inputs to pass through • Decoder — activates exactly one of many outputs based on a binary code • Comparator — determines whether one value is greater than, equal to, or less than another

The tricky boundary: memory disqualifies a circuit from being combinational

The single most important distinction to internalize is this: a circuit with memory or state is not purely combinational. The presence of any stored state — a flip-flop, a latch, feedback that lets a signal depend on its own past value — immediately moves a circuit into the sequential category, even if most of its logic looks combinational. A counter, for example, uses combinational logic internally (often an adder) to compute its next value, but the counter as a whole is sequential, because its output on any given clock cycle depends on the accumulated state from all previous cycles, not solely on the inputs present right now.

This distinction is why circuit classification always starts with one question: does the output ever change for the same input combination, without the input changing? If yes, some kind of memory is influencing the output, and the circuit is sequential (or at least contains a sequential element) rather than purely combinational.

Defining equation for combinational behavior

Output = f(Current Inputs)

No dependence on: past inputs, internal stored state, or clock timing (beyond real gate propagation delay).
Contrast — sequential circuit:  Output = f(Current Inputs, Stored State)

Code Examples

This is the practical test for combinational behavior: reapply the same input combination at a different time (with anything else that might have happened in between) and confirm the output is unchanged. A simple logic gate trivially passes, because gates have no internal storage element — but the same test is exactly what distinguishes a combinational adder from a sequential counter later in this module and the next.

If reapplying the same inputs ever produces a different output, the circuit is not purely combinational.

The counter fails the combinational test because it has internal memory — its next output depends on both the current input and its previously stored count. This is precisely the spec's tricky problem: a circuit with memory/state is not purely combinational, even though the counter's internal increment logic may itself use a combinational adder.

A circuit whose output depends on stored state, not just current inputs, is sequential — not combinational.

Circuit under test: a 2-input AND gate, Y = A AND B

Trial 1: A=1, B=0 at time t1 -> Y=0
Trial 2: A=1, B=1 at time t2 -> Y=1
Trial 3: A=1, B=0 at time t3 (same inputs as Trial 1, later in time) -> Y=0  (identical to Trial 1)

Because Trial 1 and Trial 3 use identical inputs and produce identical outputs regardless of
what happened at Trial 2 in between, the AND gate satisfies Output = f(Current Inputs) and is combinational.

Circuit under test: a 1-bit up counter with a stored count value

Trial 1: clock pulse arrives (input = "count") -> output = 0001 (count was 0000, now increments)
Trial 2: clock pulse arrives (same input = "count") -> output = 0010 (count was 0001, now increments again)

Both trials received the identical input ("count"), yet produced different outputs, because the
counter's output depends on its internal stored state (the previous count), not on the current input alone.

Combinational circuit as a pure function block

A pure combinational block: signal flow moves strictly forward from inputs to outputs, with no feedback loop.

Inputs                    Combinational                 Outputs
  A, B, C, ... -----------> |    Logic Block    | -----------> Y1, Y2, ...
                             (gates only, no feedback,
                              no clock, no stored state)

  Output = f(Current Inputs)   <-- no arrow ever loops back from output to input

Important Rules

A combinational circuit's output is a function of its current inputs only: Output = f(Current Inputs).

No internal memory element (latch, flip-flop, or feedback loop) may influence the output.

Reapplying the same input combination must always produce the same output, regardless of history.

Adders, subtractors, multiplexers, decoders, and comparators are canonical combinational building blocks.

Any circuit containing memory or state is sequential, not combinational — even if it is built largely from combinational sub-blocks.

Why the combinational/sequential split organizes real digital design

Every digital design tool, timing analyzer, and hardware description language (Verilog/VHDL) treats combinational and sequential logic as fundamentally different categories, because they are analyzed and verified with different techniques: combinational logic is checked with propagation-delay and worst-case-path timing analysis, while sequential logic additionally requires clock-domain analysis, setup/hold timing, and state-machine verification. Recognizing whether a block of logic is combinational is the very first classification step in reading any real digital design, from a simple adder in a microcontroller's ALU to the datapath of a full CPU.

Assuming any circuit built entirely out of logic gates (AND, OR, XOR, etc.) must automatically be combinational.

Check specifically for feedback and stored state; a circuit can use only basic gates yet still be sequential if those gates are wired into a feedback loop that stores a bit (this is, in fact, how the simplest latches are built).

The gate types used do not determine combinational vs. sequential classification — the wiring topology (presence or absence of feedback/state) does. The spec's tricky problem underscores exactly this: a circuit with memory/state is not purely combinational, regardless of what components it's made from.

Which equation correctly defines a combinational circuit's behavior? A. Output = f(Current Inputs) B. Output = f(Current Inputs, Clock Edge) C. Output = f(Stored State) D. Output = f(Previous Outputs)

A. Output = f(Current Inputs) — By definition, a combinational circuit's output depends only on its present inputs, with no dependence on stored state, clock edges, or its own previous outputs — that dependence on the past is exactly what would make it sequential instead.

[tricky] A circuit is built from ordinary logic gates but includes a feedback loop that lets it hold a bit value even after its input changes. Is this circuit combinational? A. No — a circuit with memory or state is not purely combinational, regardless of the gate types used to build it B. Yes, because it uses only basic logic gates and no dedicated flip-flop component C. Yes, as long as the feedback loop is small (one or two gates) D. It depends only on whether a clock signal is present

A. No — a circuit with memory or state is not purely combinational, regardless of the gate types used to build it — The spec's tricky problem states this directly: a circuit with memory/state is not purely combinational. Feedback that lets a circuit hold (remember) a value — even when built from ordinary AND/OR/NOT gates — introduces state, which disqualifies it from the combinational category regardless of the specific components used.

Which of the following is NOT one of the five canonical combinational building blocks named in this module's overview? A. Flip-flop B. Adder C. Multiplexer D. Comparator

A. Flip-flop — The module's canonical combinational examples are adder, subtractor, multiplexer, decoder, and comparator. A flip-flop is a memory (storage) element and belongs to sequential logic, not combinational logic.

A student claims a 2-to-1 multiplexer built purely from AND, OR, and NOT gates (no flip-flops) is 'technically sequential' because its output changes over time as the select line changes. Explain why this claim is incorrect.

The multiplexer's output changes only because its inputs (including the select line) changed — for any fixed combination of inputs, the output is always the same value, satisfying Output = f(Current Inputs). An output that varies over time simply because the inputs vary over time is expected combinational behavior, not evidence of memory. The circuit would only be sequential if its output could differ for an identical, unchanged input combination, which does not happen here.

Distinguish between an output changing because the input changed, versus an output changing while the input stays the same.