Small-Signal Analysis & the Miller Effect

The linear toolkit behind amplifier design. Learn the operating point and linearisation, incremental models, transconductance, input and output resistance, voltage/current/power gain, Thevenin/Norton small-signal equivalents, BJT hybrid-π and T models, MOSFET models with g_m, g_mb and r_o, device capacitances (C_π, C_µ, C_gs, C_gd), the Miller theorem and effective input capacitance, pole estimation and bandwidth limits, and the transition frequency f_T — with Python computing the Miller capacitance, input and output poles and f_T of a CE stage.

Transistors are nonlinear, but for small variations around a fixed operating point they behave linearly. Small-signal models replace the device with resistors and controlled sources, so all the linear circuit-analysis tools apply.

Adding the device capacitances reveals why high-gain stages lose bandwidth: a small feedback capacitance across an inverting gain is multiplied — the Miller effect.

An analogy

Small-signal analysis is like studying a curved road by looking at a short straight segment under your feet — the slope there (g_m) tells you how the car responds to small steering changes, even though the whole road curves.

The small-signal method

1) Find the DC operating point (bias). 2) Compute small-signal parameters (g_m, r_π, r_o) at that point. 3) Draw the AC circuit: DC sources become AC grounds, coupling/bypass capacitors become shorts at midband. 4) Replace transistors with their models. 5) Solve the linear circuit for gains and resistances. Superimpose the AC result on the DC bias to get total signals.

Models

Choose the convenient form:

The Miller effect

An impedance connected between the input and output of an inverting amplifier with gain −A appears at the input as Z/(1 + A). For a capacitor this multiplies capacitance by (1 + A). It dominates the high-frequency response of CE/CS stages, slows switching MOSFETs (the gate-charge 'Miller plateau'), and is deliberately exploited in Miller compensation of op-amps.

Estimating bandwidth

Methods: exact nodal analysis (two poles plus a right-half-plane zero from C_µ feedforward), the Miller approximation (good for the dominant input pole when source impedance is high), and open-circuit time constants (sum of R·C for each capacitor with others open) giving ω_H ≈ 1/Σ R_i0C_i. Ways to extend bandwidth: cascode, emitter/source degeneration, lower source impedance (emitter-follower driver), common-base input, shunt peaking and distributed amplifiers.

Formulas

Worked example: Miller capacitance

Given: C_gd 5 pF, gain −20

Find: C_in,M.

Answer: 105 pF

Worked example: f_T

Given: g_m 40 mS, C_π 18 pF, C_µ 2 pF

Find: f_T.

Answer: 318 MHz

Worked example: Input pole

Given: R_sig′ 750 Ω, C_in 320 pF

Find: f_p.

Answer: 663 kHz

CE stage with Miller capacitance

  R_sig        C_µ (feedback, base–collector)
 ─/\/\─┬────────||─────────┐
        │ B                  │ C
      r_π ∥ C_π      g_m·v_be ↓  R_L′ = R_C ∥ R_L
        │ E                  │
       GND                  GND
  Miller: C_µ seen at input ×(1 + g_m R_L′) → dominant input pole

C_µ connects input to an inverted, amplified output; charging it requires (1 + |A_v|) times the charge of a grounded capacitor. At the input it looks like a huge capacitor — combined with the source resistance it sets a low pole.

Miller capacitance, poles and f_T

# Miller effect and input pole of a common-emitter stage
IC, VT, beta = 1.074e-3, 0.02585, 150
gm, RC_L, Cmu, Cpi = IC / VT, 3.59e3, 2e-12, 20e-12      # RC || RL = 5.6k || 10k
rpi = beta / gm
Av = -gm * RC_L
CM = Cmu * (1 - Av)
print(f"midband gain {Av:.0f}; Miller capacitance {CM*1e12:.0f} pF; total input {(CM+Cpi)*1e12:.0f} pF")
import math
Rsig_eff = 1 / (1/1000 + 1/rpi + 1/14.8e3)      # 1k source || r_pi || bias divider (82k || 18k)
fp = 1 / (2 * math.pi * Rsig_eff * (CM + Cpi))
print(f"input pole ~ {fp/1e6:.2f} MHz (source 1k)")
print(f"output pole ~ {1/(2*math.pi*RC_L*(Cmu+5e-12))/1e6:.1f} MHz (5 pF load)")
fT = gm / (2 * math.pi * (Cpi + Cmu))
print(f"fT = gm / 2pi(Cpi+Cmu) = {fT/1e6:.0f} MHz")
# midband gain -149; Miller capacitance 300 pF; total input 320 pF
# input pole ~ 0.67 MHz (source 1k)
# output pole ~ 6.3 MHz (5 pF load)
# fT = gm / 2pi(Cpi+Cmu) = 301 MHz

A tiny 2 pF C_µ becomes 300 pF at the input because of the −149 gain — 15× larger than C_π itself. The resulting input pole (670 kHz) limits bandwidth far below the transistor's 300 MHz f_T. Lower source resistance, a cascode (which kills the Miller multiplication) or less gain per stage fixes it.

Common mistakes

Applications

Key takeaways

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