Capstone Projects: Complete Analog Signal Chains

Bringing everything together into complete systems. Work through the structure of a professional analog project (requirements, architecture, gain and level planning, noise and error budgets, component selection, simulation, layout, test plan, verification report) and five capstone briefs — audio preamp + ADC, precision thermocouple/RTD logger, ECG front end, bench power supply with current limit, and a PLL-based FM receiver — with Python building a gain/level/noise diagram for a microphone-to-ADC chain.

A capstone is where you prove you can design an analog system end to end: from a written requirement to a verified board, with numbers that justify every choice.

The key professional artefacts are the level diagram (where signal and noise sit at every stage), the error budget, and a test report comparing measured with required performance.

An analogy

A capstone is like building a house rather than practising carpentry: you still use the same cuts and joints, but now the foundations (power, grounding), plumbing (signal chain) and inspection (testing) must all work together.

Capstone briefs

Pick one and complete the full structure:

Level diagrams

Plot signal level (nominal and maximum) and noise level at each stage in dBV. The gap between maximum and each stage's clipping level is headroom; the gap between signal and noise is SNR. Gain placed early improves SNR but reduces headroom; switchable/variable gain resolves the conflict in wide-dynamic-range systems.

Verification and documentation

Write a test for every requirement: method, equipment, conditions, pass criteria. Include environmental (temperature), EMC pre-compliance and long-duration tests. The final report compares measured results with requirements and budgets, explains deviations and records design changes — a professional deliverable and an excellent portfolio piece.

Common pitfalls

Vague requirements, no level diagram (clipping or noise surprises), ignoring power and grounding until layout, no test points, testing only at room temperature, and changing multiple things during bring-up. Reviews at each stage (requirements, architecture, schematic, layout) catch most of these early.

Formulas

Worked example: Headroom

Given: Nominal 0.5 V rms, FS 2 V rms

Find: Headroom.

Answer: 12 dB

Worked example: SNR

Given: 0.5 V signal, 18.4 µV noise

Find: SNR.

Answer: ≈ 88.7 dB

Worked example: Stage order

Given: Filter noise 20 nV/√Hz after ×50 gain

Find: Input-referred contribution.

Answer: 0.4 nV/√Hz — negligible

Capstone project structure

  1. Requirements (numbers!): signal range, bandwidth, accuracy, noise, power, environment, cost
  2. Architecture: block diagram, level diagram, power tree, grounding plan
  3. Budgets: gain/level, noise, error, power, thermal
  4. Detailed design: component selection with margins, protection
  5. Simulation: .op/.ac/.tran/.noise + corners + Monte Carlo
  6. Layout review → build → bring-up checklist
  7. Test plan & report: each requirement → method → result → pass/fail

Following this structure makes design decisions traceable: every component value links back to a requirement or budget line, and every requirement has a test that proves it.

Level and noise diagram for a mic-to-ADC chain

import math
# Capstone chain budget: microphone -> preamp -> filter -> ADC driver -> 24-bit ADC (2 V rms FS)
stages = [
    # name, gain (V/V), input-referred noise (nV/rtHz) of this stage
    ("mic preamp", 50.0, 2.0),
    ("anti-alias filter", 1.0, 20.0),
    ("ADC driver", 1.0, 8.0),
]
B = 20e3
sig_in = 10e-3                          # 10 mV rms loud speech at the mic
g_total = 1.0
noise_out_sq = 4 * 1.380649e-23 * 300 * 150   # 150 ohm mic source thermal noise (V^2/Hz)
level = sig_in
for name, g, en in stages:
    noise_out_sq = (noise_out_sq + (en * 1e-9) ** 2) * g**2
    level *= g
    g_total *= g
    print(f"{name:18s} gain {g:6.1f}: signal {level:.3f} V rms, noise {math.sqrt(noise_out_sq*B)*1e6:.1f} uV rms")
adc_noise = 2.0 / 10 ** (120 / 20)       # ADC with 120 dB dynamic range at 2 V rms FS
total = math.sqrt(noise_out_sq * B + adc_noise**2)
print(f"ADC noise {adc_noise*1e6:.1f} uV rms; total {total*1e6:.1f} uV -> SNR {20*math.log10(level/total):.1f} dB, headroom {20*math.log10(2.0/level):.1f} dB")
# mic preamp         gain   50.0: signal 0.500 V rms, noise 18.0 uV rms
# anti-alias filter  gain    1.0: signal 0.500 V rms, noise 18.2 uV rms
# ADC driver         gain    1.0: signal 0.500 V rms, noise 18.3 uV rms
# ADC noise 2.0 uV rms; total 18.4 uV -> SNR 88.7 dB, headroom 12.0 dB

With ×50 of preamp gain, loud speech (10 mV) reaches 0.5 V rms — 12 dB below the ADC's 2 V rms full scale, leaving headroom for shouting. The preamp's own noise dominates (18 µV rms over 20 kHz); later stages and the 24-bit ADC add almost nothing, so the chain SNR is ~89 dB. Putting the gain first is why the filter's 20 nV/√Hz barely matters.

Common mistakes

Applications

Key takeaways

Going further