Packed & Unpacked Arrays

Multi-dimensional packed vectors, unpacked arrays with C-style sizes, foreach, %p and array literals.

SystemVerilog arrays have two kinds of dimensions. Packed dimensions, written before the name, build one contiguous vector that can be used as a number. Unpacked dimensions, written after the name, make a collection of separate elements, like a memory.

What to remember

logic [7:0] mem [256]; assign x = mem + 1; // error assign x = mem[addr] + 1;

An unpacked array is a collection, not a number. Only packed arrays can be used directly in arithmetic.

How many bits is logic [1:0][3:0][7:0] v;?

2 x 4 x 8 = 64 bits, as one packed vector.

What does int a[4]; mean compared with int a[0:3];?

The same thing: four elements indexed 0 to 3. The [N] form is the C-style shorthand.